Hybrid chips from AMD, similar to ARM big.LITTLE or Foveros from Intel, may be on the way depending on the patent license filed by the company.
It has been almost a decade since ARM introduced the big.LITTLE chips. These types of designs allow a single processor to use two or more different CPU cores. Its name derives from the idea of pairing “big” high-performance cores with “small” low-power cores in order to combine the best of both worlds: speed and battery life.
These hybrid computing designs they have been a total success and virtually all manufacturers that produce mobile devices such as smartphones and tablets under ARM license use them.
More recently, Intel has gone into these kinds of designs with its own platform named «Lakefield«. A hybrid CPU architecture with new Foveros 3D packaging technology that combines a high-performance 10nm Sunny Cove core with four Intel Atom processor-based cores in a compact package. We have already seen it implemented in the Core i5-L16G7 that will use models such as the Surface Neo or the Galaxy Book S.
AMD Hybrid Chips
In the midst of market share surge, AMD does not want to be left out of these types of designs. A recently filed patent application by AMD describes a “Heterogeneous processor system” that allows you to use two processors together, including a higher performance processor and a second that “It is configured to execute an instruction thread consuming less energy and with less performance than the first”.
Does it sound familiar? If AMD goes this way, it wouldn’t be the company’s first foray into heterogeneous computing. In 2014, the company touted the ability of its processors to take advantage of CPU and GPU functions simultaneously for accelerated performance when executing certain tasks.
Although it has not been published until now, the patent application was originally presented in 2017, which indicates AMD’s interest in these types of designs. The patent describes an implementation that allows a subset of instructions to run on larger full processing cores optimized for higher performance, while a second subset of instructions runs on smaller simplified cores designed for power efficiency.
The patent describes a method for the cores to use a shared memory location to speed up the transfer of threads based on certain variables, between the two types of cores. The method described it would allow the processor to independently classify what type of threads should run in each cluster based on the instructions supported by the inner cores. The threads could also switch between the cores based on usage.
The approach wants to reduce or deny the need for intervention of the operating system as it now happens. The patent also explains an example in which groups of nuclei could be CPU, GPU or DSP, which means that there could be a wide variety of possible combinations. In practice, the purpose of AMD’s hybrid chips is the same as ARM’s big.LITTLE or Intel Lakefield: large cores would run heavy, performance-sensitive workloads, while smaller cores would run light tasks to save power.
The application for a patent does not necessarily entail the commercialization of a product, but confirms that AMD also is investigating own designs of heterogeneous computing. These types of chips are not suitable for personal computers that need higher performance, but for many millions of other devices. We are thinking, for example, of the new generation of folding. And Apple silicon. We will see how the Cupertino people make the change in architecture from Intel x86 to ARM RISC designs where they will surely use hybrid chip designs.