X-Cube: Samsung is stacking 7-nanometer chips on top of each other for the first time

The new process enables smaller chip designs. There are also advantages in terms of energy efficiency and transmission speeds. Samsung uses X-Cube not only for its own chips, but also for contract manufacturing.

Samsung has expanded its production process called 3D stacking to arrange chips on top of one another to save space. For the first time, it was used for chips that were manufactured in the 7-nanometer EUV process. Samsung calls the new process the X-Cube.

3D stacking via X-Cube (Image: Samsung)Samsung reached the milestone with an SRAM chip that was placed on a logic chip. Until now, SRAM chips that are used as cache memories always had to be arranged next to logic chips such as CPU and GPU.

X-Cube is also based on Samsung’s TSV technology, in which wires are fed through tiny holes to connect the individual storage layers together. It not only allows more compact chip arrangements, but also increases speed and reduces power consumption. Shorter signal paths also increase the data transfer rates.

Samsung is not only using the new production process for its own chips. It is also open to customers such as Qualcomm who have chips manufactured by Samsung. X-Cube will also be available for 5-nanometer chips in the future.

In May, Samsung began building a new EUV production line for chips with structures of 5 nanometers and smaller. It should go into operation next year.

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